*-----------------------------------------------------------
* Test code for 6850
*
* 6850 Test. Based on AN817
* Echo whatever is received on RxD back out on TxD
*
* WRM 2022-07-11
*
*-----------------------------------------------------------
*

ACIA1CR   EQU      $FF2001             ; Write
ACIA1SR   EQU      $FF2001             ; Read
ACIA1TR   EQU      $FF2003             ; Write
ACIA1DR   EQU      $FF2003             ; Read

*
* AN817 is seriously fucked up. Written by a vac student (maybe)
* and never tested (definitely)
*
* Receive Data Register Full (RDRF) is bit zero, therefore tested
* using BTST #0 (not 1)
* Transmit Data Register Empty (TDRE) is bit one, therefore tested
* using BTST #1 (not 2)
* If the bit is set, BTST will clear Z (Z is set if bit is 0)
* BEQ tests for Z set, i.e. RDRF/TDRE not set
* AN817 uses BNE
*
* 
         ORG $1000

         MOVE.B    #$03,ACIA1CR        ; Reset ACIA
         MOVE.B    #$51,ACIA1CR        ; %01010001 Ints disabled,
                                       ; RTS high, 8N2, /16
ERROR    MOVE.B    ACIA1SR,D0          ; Get status
         AND.B     #$7C,D0             ; %01111100 mask IRQ, TDRE, RDRF
         BNE       ERROR
READS1   BTST.B    #0,ACIA1SR          ; RDRF? Set Z if not
         BEQ       READS1              ; Loop if Z set
         MOVE.B    ACIA1DR,D0          ; Get the character in RDR
READS2   BTST.B    #1,ACIA1SR          ; TDRE? Set Z if not
         BEQ       READS2              ; Loop if Z set
         MOVE.B    D0,ACIA1TR          ; Put the character into TDR
         BRA       ERROR               ; Not error, just repeat

