P6 state machine ROM notes

This document describes the Apple Disk II controller P6 ROM state machine

(Source: Beneath Apple ProDOS, Appendix D. Additional notes by Christer Ericson, christer@cs.umu.se)

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CODE  OPERATION                   BEFORE    AFTER
0     CLR                         XXXXXXXX  00000000
8     NOP                         ABCDEFGH  ABCDEFGH
9     SL0                         ABCDEFGH  BCDEFGH0
A     SR  (write protected)       ABCDEFGH  11111111
          (not write protected)   ABCDEFGH  0ABCDEFG
B     LOAD                        XXXXXXXX  YYYYYYYY
D     SL1                         ABCDEFGH  BCDEFGH1

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ADDRESS  Q6   Q7
$C08C    OFF  ---
$C08D    ON   ---
$C08E    ---  OFF
$C08F    ---  ON

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Q6 ON, Q7 OFF (Check write protect)
        HIGH BIT CLEAR     HIGH BIT SET
STATE   PULSE  NO PULSE   PULSE  NO PULSE
0        0A       0A       0A       0A
1        0A       0A       0A       0A
2        0A       0A       0A       0A
3        0A       0A       0A       0A
4        0A       0A       0A       0A
5        0A       0A       0A       0A
6        0A       0A       0A       0A
7        0A       0A       0A       0A
8        0A       0A       0A       0A
9        0A       0A       0A       0A
A        0A       0A       0A       0A
B        0A       0A       0A       0A
C        0A       0A       0A       0A
D        0A       0A       0A       0A
E        0A       0A       0A       0A
F        0A       0A       0A       0A

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Q6 OFF, Q7 OFF (Read)
        HIGH BIT CLEAR     HIGH BIT SET
STATE   PULSE  NO PULSE   PULSE  NO PULSE
0        18       18       18       18
1        2D       2D       38       38
2        D8       38       08       28*
3        D8       48       48       48
4        D8       58       D8       58
5        D8       68       D8       68
6        D8       78       D8       78
7        D8       88       D8       88
8        D8       98       D8       98
9        D8       29       D8       A8
A        CD       BD       D8       B8
B        D9       59       D8       C8
C        D9       D9       D8       A0
D        D8**     08       E8       E8
E        FD       FD       F8       F8
F        DD       4D       E0       E0

*)  Here is where the state machine loops, discarding sync bits
    when the high bit of the shift register is set.

**) Here is where the state machine hangs in that copy protection
    scheme that is based on a special disk of which portions of a
    track is written such that one bits arrive for each and every
    state of the state machine. (This protection reveals itself
    in that Copy II Plus and other bit copiers think the track
    is much much longer than the normal $1880, or so, nibbles.)

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Q7 ON (Write)
            Q6 OFF           Q6 ON
           HIGH BIT         HIGH BIT
STATE   CLEAR     SET     CLEAR     SET
0        18       18       18       18
1        28       28       28       28
2        39       39       3B       3B
3        48       48       48       48
4        58       58       58       58
5        68       68       68       68
6        78       78       78       78
7        08       88       08       88
8        98       98       98       98
9        A8       A8       A8       A8
A        B9       B9       BB       BB
B        C8       C8       C8       C8
C        D8       D8       D8       D8
D        E8       E8       E8       E8
E        F8       F8       F8       F8
F        88       08       88       08


This file was brought to you by Christer Ericson. (christer@cs.umu.se)